1). Field of the Invention
This invention relates to an electronic assembly and a method of constructing an electronic assembly.
2). Discussion of Related Art
Ferroelectric polymer memory chips, like other integrated circuits, are formed on semiconductor wafers. An insulating layer is typically formed on the wafer first. A lower set of electrodes is formed on the insulating layer over which a polymeric layer is then deposited.
After the polymer is cured and/or annealed, a series of topographic formations, or a “roughness,” manifests on the surface of the polymeric layer. These formations can be on the order of the thickness of the substrate and can include valleys, which extend to the lower electrodes and/or insulating layer below.
An upper set of electrodes is then formed on the polymeric layer. The conductive materials, typically metals, used in the upper electrodes are highly reactive with the polymer. If these materials make contact, a chemical reaction may begin which leads to the failure of the device. Typically, an interface layer is formed between the upper electrodes and the polymeric layer to prevent such contact from taking place. However, such interface layers are typically only approximately 50 angstroms thick, and due to the severity of the topography of the polymeric layer, the interface layer is often not thick enough to protect the polymer from reacting with the metals of the upper electrodes.